In a process of manufacturing various semiconductor devices, a silicon nitride film is formed as, e.g., a gate insulating film of a transistor. In order to form such a silicon nitride film, in addition to a method of depositing a silicon nitride film by chemical vapor deposition (CVD), for example, a method of forming a silicon oxynitride film by introducing nitrogen into a silicon oxide film through a plasma process has been proposed (see, e.g., Japanese Patent Laid-open Publication No. 2001-274148: Patent Document 1).
Recently, as the gate insulating film becomes increasingly thinner in association with miniaturization of a semiconductor device, formation of a thin gate insulating film having a film thickness of several nm is required. On this account, formation of a silicon nitride film through direct nitriding of silicon has been actively studied.
As a method for forming a gate insulating film by introducing nitrogen directly to a silicon substrate, there is proposed a method for forming the gate insulating film, wherein the method includes a step of forming a first nitride film on the semiconductor substrate, a step of forming a first oxide layer between the semiconductor substrate and the first nitride film as well as simultaneously forming a second oxide layer on the first nitride film, and a step of forming a second nitride film or an oxynitride film on the first nitride film by carrying out nitriding of the second oxide layer, in order to render uniform the film thickness of the gate insulating film to reduce an equivalent oxide thickness (EOT) (see, e.g., Japanese Patent Laid-open Publication No. 2005-93865: Patent Document 2).
In the above method of Patent Document 2, the silicon nitride film is formed by carrying out direct nitriding of the silicon substrate. Then, oxidation and nitriding are performed to thereby form the silicon oxide layer, the first silicon nitride film, and the second silicon nitride film (or the silicon oxynitride film) on the interface of the silicon substrate.
However, in case of the gate insulating film formed by the method disclosed in Patent Document 2, due to interface states and fixed charges being developed, threshold voltage is varied and flat band voltage (Vfb) is increased, thereby negatively influencing upon mobility of electrons or holes in a transistor. In accordance with the method of Patent Document 2, it is difficult to form a high quality gate insulating film having excellent electrical characteristics on the transistor.